
ClaudeandClaude Opus 5.5
2b10b01c49
test: retire dense-route tests, require tiles everywhere (D2)
Retired with the dense refinement route (results recorded at 1573942 and
2469af7 or named as accepted losses):
- test_refinement_blocked_base: BlockedBaseGPU exact parity (3 tests),
DenseBlockedRouteParity (6 tests incl. MRT and two bodies),
DenseBlockedRouteCPU (capability matrix, ledger comparator);
- test_refinement_blocked_fine: BlockedFineGPU dense-vs-blocked (3 tests);
- test_refinement_mrt_gpu: test_dense_versus_blocked_mrt_two_level;
- test_raw_exchange_gpu: test_dense_fine_storage_reference (private
link_exchange cut-link oracle, accepted loss);
- test_refinement_gpu: test_bounded_equivalence_and_ownership (dense
CELERIS_REFINEMENT_AUDIT ownership counters, accepted loss); its physics
stays in test_bounded_equivalence_blocked; eight_steps loses the audit
branch and the misleading 'ownership/counts PASS' label;
- test_fine_surface_gpu: test_fine_surface_four_hops (dense per-hop flux
ledger, CurvedLinkSoA reflection oracle, audit counts: accepted losses;
raw exchange covers the boundary part only, not full flux closure) and the
dense SoA fault tests (missing surface buffer, close frees SoA); blocked
equivalents remain in test_refinement_blocked_fine/_base;
- test_raw_exchange.test_dense_observation_rejected_before_device_access.
New TileContractCPU: level_blocks omitted/None/wrong length/None entry/
wrong arity/non-integer/bool/non-positive/non-tuple/not dividing all raise
before CUDA; whole-level tiles reach CUDA. Rejection tests and fixtures pass
tiles; launch-order and kernel-text tests follow the blocked root;
examples/fixed_periodic_patch uses whole-level tiles (+ host tile test).
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
2026-10-27 15:12:20 +00:00
..
2026-10-22 00:26:41 +00:00
2026-06-20 18:17:07 +08:00
2026-10-21 16:47:22 +08:00
2026-10-16 03:27:13 +00:00
2026-06-20 18:17:07 +08:00
2026-10-26 14:07:34 +00:00
2026-10-18 00:24:09 -07:00
2026-10-26 13:59:39 +00:00
2026-10-15 10:13:49 +08:00
2026-10-20 21:59:15 +08:00
2026-06-20 18:17:07 +08:00
2026-10-27 15:12:20 +00:00
2026-10-15 10:40:39 +08:00
2026-10-16 20:51:29 -07:00
2026-10-15 10:13:49 +08:00
2026-10-21 16:49:41 +08:00
2026-10-17 01:00:10 -07:00
2026-10-18 00:15:52 -07:00
2026-10-15 09:02:05 +00:00
2026-10-19 22:43:22 +08:00
2026-10-18 00:15:52 -07:00
2026-10-21 16:49:41 +08:00
2026-10-16 20:51:29 -07:00
2026-10-26 14:07:34 +00:00
2026-06-20 18:17:07 +08:00
2026-10-16 20:51:29 -07:00
2026-10-26 19:15:50 +00:00
2026-10-22 01:46:49 +00:00
2026-10-18 15:04:51 -07:00
2026-10-27 15:12:20 +00:00
2026-10-18 12:54:44 +00:00
2026-10-27 15:12:20 +00:00
2026-10-21 16:47:22 +08:00
2026-10-26 22:20:21 +00:00
2026-10-27 15:12:20 +00:00
2026-10-27 01:10:15 +00:00
2026-10-18 10:31:25 +00:00
2026-10-15 10:13:49 +08:00
2026-10-26 22:36:15 +08:00
2026-10-16 11:09:49 -07:00
2026-10-17 00:18:00 -07:00
2026-10-26 13:59:39 +00:00
2026-10-27 15:12:20 +00:00
2026-10-26 13:59:39 +00:00
2026-10-27 01:10:15 +00:00
2026-10-15 10:13:49 +08:00
2026-10-18 07:58:41 -07:00
2026-10-19 22:43:22 +08:00
2026-10-26 13:59:39 +00:00
2026-10-15 10:13:49 +08:00
2026-06-20 18:17:07 +08:00
2026-10-16 23:27:28 -07:00
2026-10-18 12:33:07 +00:00
2026-10-18 13:09:31 +00:00
2026-10-16 20:51:29 -07:00
2026-10-16 20:51:29 -07:00
2026-10-21 16:49:41 +08:00