feat: add matched SRT channel closure for blocked AMR root
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// Actual production step kernels under a CPU launch shim. No CUDA claim.
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#include <cmath>
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#include <cstdio>
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#include <cstdint>
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#include <vector>
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#define __device__
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#define __constant__
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#define __global__
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#define __forceinline__ inline
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#define __launch_bounds__(...)
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#define LATTICE_D2Q9 0
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#define LATTICE_D3Q19 1
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#define LATTICE_MODEL 0
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#define NQ 9
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#define DIM 2
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#define NZ 1
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#define NT 1
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#define COLLISION_MODEL 0
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#define USE_LES 0
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#define RHO 1.f
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#define U0 .025f
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#define OMEGA_COLLISION_MIN .01f
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#define OMEGA_COLLISION_MAX 1.99f
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#define Y_WALL_BC 0
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#define OUTLET_MODE 0
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struct Dim {unsigned int x=0,y=0,z=0;} threadIdx,blockIdx,blockDim;
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inline float __fdiv_rn(float a,float b){return a/b;}
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#include "core/precision.cuh"
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#include "core/descriptors.cuh"
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#include "core/layout.cuh"
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#include "core/params.cuh"
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#include "core/flags.cuh"
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#include "operators/macro.cuh"
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#include "operators/collision_srt.cuh"
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#include "streaming/pull_double_buffer.cuh"
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#if UNIFORM
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#include "operators/forcing_guo.cuh"
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#include "operators/helpers.cuh"
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#include "boundary/bounce_back.cuh"
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#include "boundary/inlet_outlet.cuh"
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#include "step/one_step_double.cu"
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#else
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constexpr unsigned char KIND_OUTER=2;
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#include "step/block_channel.cu"
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#endif
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int main(){
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constexpr int gx=24,gy=20,n=gx*gy;
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std::vector<float> state(9*n),next(9*n);
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for(int q=0;q<9;q++)for(int y=0;y<gy;y++)for(int x=0;x<gx;x++)
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state[q*n+y*gx+x]=d_w[q]*(1.f+.001f*std::sin(float(x+3*y+q)))-USE_DDF_SHIFTING*d_w[q];
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d_params={1.25f,0,0,0,0};
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#if UNIFORM
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std::vector<uint16_t> flags(n,FLAG_FLUID);
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for(int y=0;y<gy;y++)for(int x=0;x<gx;x++){
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if(y==0||y==gy-1) flags[y*gx+x]=FLAG_SOLID|FLAG_BC_WALL;
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else if(x==0) flags[y*gx+x]=FLAG_SOLID|FLAG_BC_INLET;
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else if(x==gx-1) flags[y*gx+x]=FLAG_SOLID|FLAG_BC_OUTLET;
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}
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#else
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constexpr int bx=NX-2,by=NY-2,nbx=gx/bx,nby=gy/by;
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std::vector<float> input(nbx*nby*9*TOTAL_CELLS),output(input.size());
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d_block_channel={gx,gy,U0};
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#endif
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for(int step=0;step<5;step++){
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#if UNIFORM
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for(int y=0;y<gy;y++)for(int x=0;x<gx;x++){
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blockIdx={unsigned(x),unsigned(y),0};OneStep(flags.data(),state.data(),next.data());
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}
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#else
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// Populate cores and every wrapped halo from the same dense source.
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for(int b=0;b<nbx*nby;b++)for(int y=0;y<NY;y++)for(int x=0;x<NX;x++)for(int q=0;q<9;q++){
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int xx=((b%nbx)*bx+x-1+gx)%gx, yy=((b/nbx)*by+y-1+gy)%gy;
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input[b*9*TOTAL_CELLS+q*TOTAL_CELLS+y*NX+x]=state[q*n+yy*gx+xx];
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}
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for(int b=0;b<nbx*nby;b++)for(int y=1;y<NY-1;y++)for(int x=1;x<NX-1;x++){
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blockIdx={unsigned(x),unsigned(y),unsigned(b)};
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BlockChannelStep(input.data(),output.data(),1,nullptr,nullptr);
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for(int q=0;q<9;q++)next[q*n+((b/nbx)*by+y-1)*gx+(b%nbx)*bx+x-1]=output[b*9*TOTAL_CELLS+q*TOTAL_CELLS+y*NX+x];
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}
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#endif
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state.swap(next);
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}
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for(float f:state)printf("%.9g\n",f);
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}
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@@ -0,0 +1,99 @@
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"""Root-channel host contract and actual-header CPU parity (no CUDA evidence)."""
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from dataclasses import replace
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import numpy as np
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import pytest
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from CelerisLab.config import LBMConfig
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from CelerisLab.lbm.blocks import BlockLayout2D
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from CelerisLab.lbm.channel import channel_masks, validate_channel_config, validate_channel_transfers
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from CelerisLab.lbm.refinement import FixedPatch2D
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from CelerisLab.lbm.refinement_tables import blocked_base_tables
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from .test_numerical_operators import compile_run
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@pytest.mark.parametrize("shift", [0, 1])
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@pytest.mark.parametrize("profile", [0, 1])
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def test_actual_kernel_uniform_parity(tmp_path, shift, profile):
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"""Nonuniform ghosts, corners, top wall, global profile and outlet halo donor."""
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defines = dict(USE_DDF_SHIFTING=shift, INLET_PROFILE=profile)
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uniform = np.array(compile_run(tmp_path, "channel_root.cpp", dict(
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defines, UNIFORM=1, NX=24, NY=20)), np.float32)
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assert np.isfinite(uniform).all()
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for by, bx in ((20, 24), (5, 6), (4, 1)):
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blocked = np.array(compile_run(tmp_path, "channel_root.cpp", dict(
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defines, UNIFORM=0, NX=bx+2, NY=by+2)), np.float32)
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np.testing.assert_array_equal(blocked, uniform)
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def transfer(bounds, block=(4, 6)):
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cfg = LBMConfig(nx=24, ny=20, viscosity=.1)
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pair = FixedPatch2D.from_config(cfg, bounds)
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layout = BlockLayout2D.build(20, 24, *block)
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targets = blocked_base_tables(pair, layout, np.argsort(pair.coalesce_coarse))[1]
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return pair, layout, targets
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def test_masks_and_minimal_footprint():
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fluid, bulk = channel_masks((20, 24))
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assert fluid.sum() == 18*22 and bulk.sum() == 16*22
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assert fluid[1, 1] and not bulk[1, 1]
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assert bulk[2, 1] and not fluid[0, 0]
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# No tile alignment or artificial large padding: closest legal x donor is x=1.
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validate_channel_transfers(*transfer((3, 4, 19, 16)))
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for bounds in ((2, 4, 19, 16), (3, 3, 19, 16), (3, 4, 22, 16), (3, 4, 19, 17)):
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with pytest.raises(ValueError, match="bulk"):
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validate_channel_transfers(*transfer(bounds))
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def test_actual_closure_read_conflicts():
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pair, layout, targets = transfer((6, 6, 18, 14))
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validate_channel_transfers(pair, layout, targets)
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for target in (layout.slot(layout.owner[5, -1]-1, 2),
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layout.slot(layout.owner[1, 4], 4),
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layout.slot(layout.owner[-2, 4], 3)):
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with pytest.raises(ValueError, match="immutable"):
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validate_channel_transfers(pair, layout, np.append(targets, target))
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def test_channel_scope():
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cfg = LBMConfig(nx=24, ny=20, viscosity=.1)
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validate_channel_config(cfg, [(4, 6), (4, 4)])
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with pytest.raises(ValueError, match="all-blocked"):
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validate_channel_config(cfg, [None, (4, 4)])
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for change in (dict(inlet_scheme="equilibrium"), dict(outlet_mode="zero_gradient"),
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dict(y_wall_bc="free_slip"), dict(wall_slot_width=2)):
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with pytest.raises(ValueError, match="channel requires"):
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validate_channel_config(replace(cfg, **change), [(4, 6), (4, 4)])
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def test_evolved_ghost_snapshot_and_physical_download():
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from contextlib import nullcontext
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from unittest.mock import Mock
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from .test_refinement_three_level_multipatch import host_module
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host = host_module()
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storage = {}
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host.compiler.load_module.return_value.get_global.side_effect = lambda name: (name, 12 if name == "d_block_channel" else 20)
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host.cuda.mem_alloc.side_effect = lambda size: Mock()
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host.cuda.memcpy_htod.side_effect = lambda ptr, a: storage.__setitem__(id(ptr), np.array(a, copy=True))
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host.cuda.memcpy_dtoh.side_effect = lambda a, ptr: np.copyto(a, storage[id(ptr)])
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context = Mock(activate=nullcontext, sm_arch="sm_70")
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cfg = LBMConfig(nx=24, ny=20, viscosity=.1, velocity=.025)
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backend = host.FixedPatchStepper(cfg, (6, 6, 18, 14), context=context,
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coarse_boundary="channel", base_block=(4, 6), fine_block=(4, 4))
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try:
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weights = np.array([4/9]+[1/9]*4+[1/36]*4)[:, None, None]
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arrays = [np.broadcast_to(weights, level.shape).copy() for level in backend._levels]
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arrays[0][:, 0, 0] *= 1.001
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backend.initialize(*arrays)
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snapshot = backend._download_raw()
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assert np.isfinite(snapshot.values[0][:, 0, :]).all()
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assert np.isnan(backend.download()[0][:, 0, :]).all()
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backend._initialize_raw(snapshot)
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for a, b in zip(snapshot.values, backend._download_raw().values):
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np.testing.assert_array_equal(a, b)
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arrays[0][0, 0, 0] = np.nan
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with pytest.raises(ValueError, match="finite"):
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backend.initialize(*arrays)
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assert backend._levels[0].kernel == host.compiler.load_module.return_value.get_function("BlockChannelStep")
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finally:
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backend.close()
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